textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_riscv64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_armhf.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_arm64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo
textdraw_0.2+ds-0+nmu1_i386.buildinfo
textdraw_0.2+ds-0+nmu1_amd64.buildinfo